Title:
SEMICONDUCTOR INSPECTION METHOD
Document Type and Number:
Japanese Patent JP2004253585
Kind Code:
A
Abstract:
To reduce inspection time and thus reduce costs therefor in inspecting electric characteristics of each semiconductor element formed on a semiconductor wafer, and to uniformize stresses imposed on each semiconductor element during the inspection for facilitation of quality control of the semiconductor elements.
In inspecting the electric characteristics of the semiconductor elements formed on the semiconductor wafer by using an asymmetrical probe card for multi-probing, a probe card having a symmetrical location and a probe card having an asymmetrical location in terms of software are adapted to be used properly at every touchdown, so as to avoid repeated inspection of a particular semiconductor element.
Inventors:
KOBASHI TOSHIO
Application Number:
JP2003042009A
Publication Date:
September 09, 2004
Filing Date:
February 20, 2003
Export Citation:
Assignee:
RENESAS TECH CORP
International Classes:
H01L21/66; (IPC1-7): H01L21/66
Attorney, Agent or Firm:
Keigo Murakami
Masuo Oiwa
Toshihide Kodama
Takenaka Ikuo
Masuo Oiwa
Toshihide Kodama
Takenaka Ikuo
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