Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS
Document Type and Number:
Japanese Patent JPH0495785
Kind Code:
A
Abstract:

PURPOSE: To dispense with a terminal especially for testing purpose by providing a circuit means which is turned into the testing state by an initializing means for initializing the circuit when the power is supplied and into the normal state by a signal generated from an oscillation detecting means.

CONSTITUTION: There are provided an initializing means for initializing a circuit 6 when the power is supplied and an oscillation detecting means. A reset signal is output from the initializing means when the power is fed, so that a frequency dividing circuit 7 which is a detecting means of oscillation and a D-flipflop are reset into the testing state. The circuit 7 is tested at this time. An oscillating device is added outside. The frequency dividing circuit 7 is driven when an oscillation circuit 1 is oscillated and an 'H' is output from the D-flipflop 5, whereby the testing state is released. Accordingly, the apparatus can be used normally. A special testing terminal becomes not necessary although it is required so far.


Inventors:
HIOKI SHUJI
Application Number:
JP20983590A
Publication Date:
March 27, 1992
Filing Date:
August 08, 1990
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SEIKO EPSON CORP
International Classes:
H03K3/02; G01R31/28; (IPC1-7): G01R31/28; H03K3/02
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)