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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT AND CAPACITANCE VALUE SETTING CIRCUIT
Document Type and Number:
Japanese Patent JPH07221567
Kind Code:
A
Abstract:

PURPOSE: To attain multipurpose setting of capacitance values for setting a circuit characteristic by providing a signal designating a desired capacitance value externally.

CONSTITUTION: A selection circuit 21 provides an output of H or L level selection signals S1 to Sm based on capacitance value selection designation signals SC1 to SCn obtained from capacitance value designation terminals P1-Pn. Each analog switch ASi is turned on/off based on a selection signal Si at its control input section C. That is, the switch is turned on when the signal Si is at an H level to connect a terminal N1 and a capacitor Ci corresponding thereto and the switch is turned off when the signal Si is at an L level to disconnect the terminal N1 and the capacitor Ci corresponding thereto. Thus, only the capacitor Ci in series with the switch Si in the on-state among switches AS1 to ASm is valid and the combined capacitance of the valid capacitors Ci is a capacitance value of the capacitors for circuit characteristic setting between the terminals N1 and N2.


Inventors:
HANADA YOSHIKO
Application Number:
JP1336494A
Publication Date:
August 18, 1995
Filing Date:
February 07, 1994
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03F3/45; (IPC1-7): H03F3/45
Attorney, Agent or Firm:
Takada Mamoru



 
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