Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND DATA INPUT/ OUTPUT PART THEREFOR
Document Type and Number:
Japanese Patent JP3526541
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce a jitter component caused by a level shift circuit.
SOLUTION: An output signal d1 from a logic circuit 10 is encoded into data signal Data1 and strobe signal Stb1 by a DS encoder 22. The data signal Data1 and the strobe signal Stb1 are supplied to flip-flops 26 and 27 as data signal Data1a and strobe signal Stb1a after amplitude levels thereof are converted by level shift circuits 23 and 24. The data signal Data1 and the strobe signal Stb1 are latched by the flip-flops 26 and 27 in response to the rising edge of a clock signal CLK1a and outputted to driver circuits 28 and 29 after the jitter component generated through the level shift circuits 23 and 24 is removed. These signals are outputted from the driver circuits 28 and 29 to differential signal lines 42 and 41 and outputted from terminals TPB, NTPB, TPA and NTPA to the outside.
Inventors:
Akamatsu, Hironori
Takahashi, Satoshi
Terada, Yutaka
Hirata, Takashi
Komatsu, Yoshihide
Yamauchi, Hiroyuki
Takahashi, Satoshi
Terada, Yutaka
Hirata, Takashi
Komatsu, Yoshihide
Yamauchi, Hiroyuki
Application Number:
JP2000050434A
Publication Date:
May 17, 2004
Filing Date:
February 28, 2000
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03K5/02; H03K3/037; H03K19/0185; H04L7/02; H04L25/02; H04L25/03; (IPC1-7): H04L7/02; H03K19/0185; H04L25/02; H04L25/03
Attorney, Agent or Firm:
前田 弘 （外１名）
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