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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP11297700
Kind Code:
A
Abstract:

To surely avoid corrosion of metal wirings or metal plugs formed by the COMPONENTS method.

A light shield layer 20 of e.g. a Cu film is formed above p-type semiconductor regions 4 constituting terminal resistance elements R, at the same time as a step of polishing the Cu film deposited to an upper part of an Si oxide film 21 by the CMP method to form second layer wirings 17-19, and has a wide area enough to cover approximately the entire p-type semiconductor region 4. By placing the light shield layer 20 above the p-type semiconductor region 4, the light incidence on the p-type semiconductor region 4 can be avoided in the step of polishing the Cu film by the CMP method to form the second layer wirings 17-19, and the corrosion of the wirings 17-19 due to a photo current generated by a light incident on the p-n junction is avoided.


Inventors:
Noguchi, Junji
Yamaguchi, Hide
Owada, Nobuo
Application Number:
JP1998000104629
Publication Date:
October 29, 1999
Filing Date:
April 15, 1998
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L21/3205; H01L21/304; H01L21/768; H01L21/02; H01L21/70; (IPC1-7): H01L21/3205; H01L21/304; H01L21/768