PURPOSE: To reduce the adverse effect of a parasitic transistor without causing the decrease of integration density, by supplying a current corresponding with a current flowing out by the adverse effect of the parasitic transistor, from a Miller circuit to a second element region.

CONSTITUTION: When a VG layer (vapor growth layer) 14 is affected by a VG layer 11 as a parasitic source, and a parasitic current I1 flows, a VG layer 15 constituting a Miller circuit is also affected in the same way, and almost the same parasitic current I2 as the parasitic current I1 flows. The Miller circuit is operated, and a Miller-inverted current I2' is supplied from the collector of a transistor T1 to the VG layer 14. Since the parasitic current I1 is equal to I2, and I2=I2', the current I2' corresponding with the current flowing out as the parasitic current I1 is supplied to the VG layer 14 from the Miller circuit, so that the VG layer 14 can be considered to be not affected by the parasitic current. Thereby the adverse effect of a parasitic transistor can be sufficiently reduced without causing the decrease in integration density.