SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Title:

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Document Type and Number:

Japanese Patent JP2003060060

Kind Code:

A

Abstract:

To provide a semiconductor integrated circuit device having a circuit operating in synchronism with a clock signal in which inter-line clock skew incident to alteration of the circuitry of an LSI can be optimized easily.

The semiconductor integrated circuit device comprises an inverter 66 of a clock operation circuit operating in synchronism with a clock signal, an inverter 46 of a clock timing regulation circuit formed in SOI structure, and a via hole 82 for connecting the inverters 66 and 46 electrically, formed on an Si substrate 2.

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Inventors:

NISHIO SHIGERU
OTSU TSUTOMU
FUKAZAWA TATSUYA
TANAKA HIROKAZU
HOJO MASAYASU
MASUDA SATOSHI
MATSUURA YORIKO
SAKAI TOSHIAKI

Application Number:

JP2001249828A

Publication Date:

February 28, 2003

Filing Date:

August 21, 2001

Export Citation:

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Assignee:

FUJITSU LTD

International Classes:

H01L25/18; G06F1/10; H01L21/822; H01L21/8238; H01L25/065; H01L25/07; H01L27/04; H01L27/06; H01L27/08; H01L27/092; H03K5/15; (IPC1-7): H01L21/822; H01L21/8238; H01L25/065; H01L25/07; H01L25/18; H01L27/04; H01L27/08; H01L27/092

Attorney, Agent or Firm:

Masaki Morioka

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