To provide an oscillator capable of reducing oscillation power at the time of reaching the balanced state of oscillation without lowering small signal loop gain.
In the oscillator, on one main surface of a substrate composed of a semiconductor material, an FET 1, an output matching circuit C2 having a diode 2, an LC serial resonance circuit C1 having a capacitor 3 and an inductor 4, a transmission line 5 and a source inductor 6 are disposed. The source of the FET 1 is grounded through the source inductor 6. The drain of the FET 1 is connected through a transmission line 10 to the anode of the diode 2 constituting the output matching circuit C2. The FET 1 amplifies high frequency signals inputted to a gate and outputs them from the drain to the output matching circuit C2. The diode 2 limits the oscillation power.
Osamu Kawamiya