PURPOSE: To prevent a parasitic transistor from latching up by connecting a first ground potential wiring for supplying a lower reference potential to an output buffer to a second ground potential wiring through a Schottky barrier diode.

CONSTITUTION: Bonding pads 2, 2AW2D are provided on a substrate 1 made of P-type single crystalline silicon. Power source wirings 3, 4 for supplying a potential Vcc and ground potential wirings 4, 6 for supplying a potential Vss are extended on an output buffer 7A, an input buffer 7B. The wiring 4 supplies the potential Vss to the buffer 7A, and the wiring 6 supplies the potential Vss to the wiring 6, the buffer 7B and a basic cell 8A. When a plurality of the buffers 7A are simultaneously converted from ON to OFF, a large current flows through the wiring 4 to a substrate 1 thereby to raise a substrate potential. Accordingly, the wiring 4 is connected through a Schottky barrier diode to the wiring 6, thereby escaping the current of the wiring 4 to the wiring 6. As a result, it can prevent a parasitic transistor from latching up.