PURPOSE: To prevent a through current from being generated by providing a buffer circuit for a reference voltage deviated from the reference potential of emitter coupled logic(ECL) level on the input part of a circuit which converts the signal of (ECL) level into a CMOS level signal.

CONSTITUTION: An address buffer ADB generates the ECL level signal which has a -1.3V reference voltage, a -0.9V H level, and a -1.7V L level. The amplifier LVA for level conversion which is provided on the input part of the level converting circuit LVC has an about -1.5V reference voltage VRF between a reference voltage VBB and the L level. Therefore, when an external address signal is set to an intermediate level, the output of a wired OR WOR circuit also has an intermediate potential like the voltage VBB. An amplifier LVA, however, has the voltage VRF deviating to the L-level side, so the intermediate level like the voltage VBB is regarded as an H level to generate the output signal of level corresponding to the nonselection state of a word line. Consequently, no through current flows through the output-side MOSFETs Q2 and Q4 of the circuit LVC.