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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPH04271517
Kind Code:
A
Abstract:

PURPOSE: To obtain a device in which a CMOS output or an open drain output is selected.

CONSTITUTION: A series circuit composed of a P-channel MOSFET 6, a switching circuit 7 and an N-channel MOSFET 5 is interposed between a high potential power supply 1 and a low potential power supply 2, and an output terminal 3 is connected to a connection between the switching circuit 7 and the N-channel MOSFET 5. If the switching circuit 7 is set to the closing state when turning on the P-channel MOSFET 6 or the N-channel MOSFET 5, the output terminal goes to an H level or an L level and a CMOS output is obtained at the output terminal 3. If the switching circuit 7 is closed when turning on the N-channel MOSFET 5, the output terminal 3 goes to an L level and when the switching circuit 7 is opened, the N-channel MOSFET 5 is in the floating state and an open drain output is obtained at the output terminal 3.


Inventors:
KITORA KOJI
Application Number:
JP3259491A
Publication Date:
September 28, 1992
Filing Date:
February 27, 1991
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L27/00; H03K19/0948; H03K19/173; (IPC1-7): H01L27/00; H03K19/0948; H03K19/173
Attorney, Agent or Firm:
Mamoru Takada (1 person outside)