PURPOSE: To form elements in a small size, and moreover to prevent a semiconductor integrated circuit device from a reduction of terminal voltage when a bi-polar transistor and a C-MOS FET are to be made to coexist in an n type epitaxial layer on a p type substrate buried with n+ type layers by a method wherein formation of the buried layer directly under a p-well is avoided.
CONSTITUTION: An n- type epitaxial layer 2 on a p- type Si substrate 1 buried with n+ type layers 3a, 3b is isolated by a p type layer 4, and a p- well 5 is formed avoiding the layer 3a. Field oxide films 8 are formed selectively, and an n+ type collector lead out layer 9 and a p type base 10 are provided by diffusion in order in the n- type layer 2 on the layer 3b at first, and poly-Si gates 12 are formed on the n- type layer 2 on the layer 3a in succession interposing gate oxide films 11 between them. After then, p+ type layers 13, n+ type layers 16 and an n+ type emitter 17 are provided applying properly SiO2 masks 14, 15 to complete a C-MOS FET and a bi-polar transistor. According to this construction, even when the epitaxial layer 2 is formed thin, the reduction of withstand voltage according to arising to the p-well 5 from the buried layer 3a can be avoided, and the device can be formed in a fine size.
YASUOKA HIDEKI
ANZAI NORIO
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