SEMICONDUCTOR INTEGRATED CIRCUIT LOW IN POWER CONSUMPTION

Japanese Patent JP3033719

B2

PROBLEM TO BE SOLVED: To make a high speed operation in the active mode compatible with low power consumption in the standby mode by using a conventional basic circuit without any modification and to unnecessitate a complicated and delicate control signal in the case of the mode change.
SOLUTION: A power supply drop circuit 1 provides two power supply voltages VCC1, VCC2, applies the higher power supply voltage VCC1 to a high threshold level information storage circuit 4 that requires the power supply VCC1 in the standby mode and applies the lower power supply voltage VCC2 to low threshold level logic circuits 2, 6 in the high speed mode and applies no voltage VCC2 in the case of the standby mode so as to realize low power consumption in the case of the standby mode. Then the circuits consisting of components requiring the high threshold voltage are connected to a line of the power supply voltage VCC1 and the circuits consisting of components requiring the low threshold voltage are connected to a line of the power supply voltage VCC2 and the integrated circuit is provided with amplitude conversion circuits that convert amplitude of a signal which is fed from the low threshold voltage circuits to the high threshold voltage circuits so as to adjust the signal output.

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Hiroaki Iwaki
Koichi Kumagai
Susumu Kurosawa

JP24515297A

April 17, 2000

September 10, 1997

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NEC

G06F1/26; G06F1/32; G11C11/407; H01L21/8234; H01L27/088; H03K19/00; H03K19/0185; (IPC1-7): H03K19/00

Yosuke Goto (1 person outside)

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