Title:
SEMICONDUCTOR INTEGRATED CIRCUIT AND MICROCOMPUTER
Document Type and Number:
Japanese Patent JPH0627203
Kind Code:
A
Abstract:
PURPOSE: To obtain a technology for enhancing abnormality detection rate and shortening test time in a semiconductor integrated circuit equipped with a plurality of functional modules.
CONSTITUTION: A module operation control circuit 40 establishes an independent operation test mode of functional module by making selectively operable only such functional module as specified by an external signal. Since a DMAC 5 and an MSCI 6 can be operated individually, logical simulation pattern at the time when each functional module is logically debugged can be utilized as it is.
Inventors:
OSHIBA MASAFUMI
Application Number:
JP20735492A
Publication Date:
February 04, 1994
Filing Date:
July 10, 1992
Export Citation:
Assignee:
HITACHI LTD
HITACHI MICOM SYST KK
HITACHI MICOM SYST KK
International Classes:
G01R31/3185; G01R31/28; (IPC1-7): G01R31/28
Attorney, Agent or Firm:
Tamamura Shizuyo
Next Patent: TEST MODE SETTING SYSTEM FOR INTEGRATED CIRCUIT