To provide a semiconductor integrated circuit system performing data transfer by a number of interruption and specific processing for each user and improving a processing efficiency, and also to provide an emulator improving a debugging efficiency of the semiconductor integrated circuit system.

A single-chip microcomputer is provided with functional blocks such as CPUs 1 and 2, ROMs 1 and 2, RAMs 1 and 2, a RAMP, a timer, a pulse output circuit, an SCI, and A/D converter, IOPs 0 to 11, an interruption controller, a bus controller, and a clock oscillator. The functional blocks CPU 1, ROM 1, and RAM 1 are connected with IAB 1 and IDB 1, the functional blocks CPU 2, ROM 2, and RAM 2 are connected with IAB 2 and IDB 2, and the functional block RAMP is connected with a PAB and PDB. The CPU 1 and CPU 2 are operable with each other in parallel by independent interfaces with the IAB 1, IAB 2, and PAB, and the IDB 1, IDB 2, and PDB, respectively.