PURPOSE: To enhance stability of ground potential at the time of simultaneous test of a plurality of semiconductor integrated circuits formed on one wafer and to prevent noise interference due to a ground ring.

CONSTITUTION: The semiconductor integrated circuit test equipment includes a probe card 1 comprising split ground rings 7a, 7b disposed around a central window 6, a first ground probe 3 conducting with one split ground ring 7a and connected with a first semiconductor integrated circuit, and a second ground probe 3 conducting with the other split ground ring 7b and connected with a second semiconductor integrated circuit.