PURPOSE: To eliminate the power supply pin dedicated to test and prevent the break due to static electricity by providing a first power supply and ground for internal circuit as well as a second power supply and ground common to output circuit and test circuit.

CONSTITUTION: A voltage higher than the internal circuit voltage (e.g. 5V), for example, the voltage of approximately 7V is applied to a test circuit. The node voltage information of an internal circuit 14 free from voltage deterioration can be thereby read out with a sense transistor 14. Also, when the voltage of 5V as the power supply voltage of the circuit 14 is applied to the gate of an output circuit 20 having the power supply voltage of 7V, a PMOS transistor 21 forming the circuit 20 is not completely turned off. In this case, an NMOS transistor 22 is also in on state. Thus, through-current flows across the circuit 20. When zero-level voltage is forcibly applied to the gate of the circuit 20, however, the transistor 22 is completely turned off, and the flow of the through- current does not take place.