To provide a semiconductor integrated circuit which can start outputting of a clock signal quickly without starting a frequency division fault in a frequency dividing circuit when an output shut down is canceled by an output control signal.
This semiconductor integrated circuit includes an oscillation circuit 10 which performs an oscillation performance and forms an oscillation signal by connecting a vibrator, a frequency dividing circuit 30 which frequency divides the oscillation signal generated by the oscillation circuit, an output circuit 40 which outputs the oscillation signal frequency divided by the frequency dividing circuit as a buffer, and a logic circuit 70 which stops the signal output from the output circuit if needed by activating or deactivating the output circuit according to at least an output control signal.
OGURA NAOKI
Masaaki Utsunomiya
Atsushi Watanabe
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