To reduce the power consumption of and increase the arithmetic processing speed of a semiconductor integrated circuit.
The semiconductor integrated circuit has a first processor 11 operable at a first operating frequency, a second processor 12 with leakage current lower than the first processor and operable at a second operating frequency lower than the first operating frequency, and a selection part 10 capable of selectively switching the execution destination of application software to the first processor or second processor in accordance with a requested operating speed of the application software. The first processor and second processor can execute the same instruction sets. This enables high speed processing in accordance with the requested operating speed of the application software, and avoids a waste of current due to processing at a speed exceeding the requested operating speed of the application software.
MIZUNO HIROYUKI
IRIE NAOHIKO
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