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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP2008122159
Kind Code:
A
Abstract:

To synchronize a divided clock signal with the clock signal before being divided.

A clock generating circuit 1 and a synchronous circuit section 2 are formed in a semiconductor integrated circuit 30. The clock generating circuit 1 is synchronized and generates a clock signal CLKa, a clock signal CLKb and a clock signal CLKc each having the frequency differing from another. The synchronous circuit section 2 inputs the clock signal CLKa, the clock signal CLKb and the clock signal CLKc, and has a scan-designed synchronous circuit using the clock signal CLKa, the clock signal CLKb and the clock signal CLKc. The scan-designed synchronous circuit makes up a scan chain.


Inventors:
Kamata, Tetsuo
Application Number:
JP2006000304448
Publication Date:
May 29, 2008
Filing Date:
November 09, 2006
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G01R31/28; H01L21/822; H01L27/04; H03K5/00; H03K23/40
Attorney, Agent or Firm:
堀口 浩