Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP3445041
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide the integrated circuit in which a current consumption taken out of a backup power supply is small even when a load current limit function is released.
SOLUTION: A power MOSFETQ1 supplies a load current to a squib ZL, a load is fed back negatively to an input stage of an operational amplifier consisting of transistors(TRs) Q4-Q10 from a resistor RS to limit a load current supplied to the squib ZL. A release signal with a load current limit function to a terminal T6 stops the negative feedback operation. Two current mirror circuits consisting of TRs Q11-Q14 and a circuit consisting of a constant current source I4 supply a constant circumferential to the operational amplifier to control the stop of negative feedback operation.
Inventors:
Toshiya Nakano
Application Number:
JP29428195A
Publication Date:
September 08, 2003
Filing Date:
November 13, 1995
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
B60R21/01; B60R21/16; G05F3/22; H01L29/78; H01L27/04; H03F1/34; H03F3/72; (IPC1-7): H03F3/72; B60R21/32; H01L29/78; H03F1/34
Domestic Patent References:
| JP7156745A | ||||
| JP4278862A | ||||
| JP474159U |
Attorney, Agent or Firm:
Aoyama Ryo (1 person outside)