Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP3614546
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a circuit in which dispersion in a threshold level is corrected and a leakage current in the standby state is reduced by providing each of internal, detection, generation and switch circuits.
SOLUTION: A threshold level detection circuit 10A receives a well potential Vnwe11 of a P-channel MOS transistor(TR) of a circuit 16 and provides the output of a voltage S1 corresponding to a threshold level of the TR. A control signal generation circuit 12A receives a mode selection signal S0 and the voltage S1 above and provides the output of binary control signals C1, C2. A switch circuit 14A is made up of two switches sw1, sw2 and they are on/off-controlled by the control signals C1, C2 respectively and connect power supplies VB1, VB2 to a well of a P-channel TR thereby setting the well potential Vnwell to a prescribed value.
Inventors:
Tetsuyoshi Shioda
Application Number:
JP34187395A
Publication Date:
January 26, 2005
Filing Date:
December 27, 1995
Export Citation:
Assignee:
富士通株式会社
International Classes:
H01L21/8238; G05F3/24; G11C5/14; G11C11/408; H01L27/088; H01L27/092; H03K17/04; H03K17/30; H03K19/00; H03K19/0175; H03K19/094; H03K19/0948; (IPC1-7): H03K17/04; H01L21/8238; H01L27/092; H03K17/30; H03K19/0175; H03K19/094; H03K19/0948
Domestic Patent References:
| JP6139779A | ||||
| JP3290894A |
Attorney, Agent or Firm:
Tadahiko Ito