Title:
半導体集積回路
Document Type and Number:
Japanese Patent JP4435197
Kind Code:
B2
Abstract:
A semiconductor integrated circuit includes a test signal generating section which generates a test signal at the time of a test, a digital-analog converter which converts the test signal into an analog signal, an analog-digital converter which fetches a signal output from the digital-analog converter and converts the fetched signal into a digital signal, and an operating section which performs an auto-correlation arithmetic operation of a signal output from the analog-digital converter. The semiconductor integrated circuit further includes an evaluating section which evaluates presence/absence of distortion of the digital-analog converter and the analog-digital converter based on consistency of an auto-correlation arithmetic operation result in the operating section and a predetermined reference signal.
Inventors:
Koji Horisaki
Application Number:
JP2007087862A
Publication Date:
March 17, 2010
Filing Date:
March 29, 2007
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H03M1/10; H03M1/12; H03M1/66
Domestic Patent References:
| JP63169123A | ||||
| JP2004048383A | ||||
| JP3059477A | ||||
| JP5297061A | ||||
| JP2004320613A |
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto