Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH01126812
Kind Code:
A
Abstract:
PURPOSE:To facilitate the setting of an output idling current and to make the operation stable at output current flowing by constituting a specific output idling current bias circuit. CONSTITUTION:A resistor R6 is connected in series with in npn TR Q6 whose collector is connected to a collector of a pnp TR Q5, whose emitter is connected to a collector of an npn TR Q3 via a resistor 6 and an npn TR Q9 is provided, whose collector is connected to the collector of the TR Q5, whose emitter is connected to the collector of the TR Q3 and whose base is connected to the emitter of the TR Q6 respectively. Then the output idling current bias circuit is constituted by the npn TRS Q6, Q7, Q9 and the resistor R6. Thus, the operational amplifier circuit operated stably with ease of output idling current setting is obtained.
Inventors:
KAGEYAMA AKIRA
Application Number:
JP28424087A
Publication Date:
May 18, 1989
Filing Date:
November 12, 1987
Export Citation:
Assignee:
NEW JAPAN RADIO CO LTD
International Classes:
H01L27/082; H01L21/8222; H01L27/08; H03F3/30; H03F3/45; (IPC1-7): H01L27/08; H03F3/45
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