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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH03246961
Kind Code:
A
Abstract:

PURPOSE: To suppress fluctuation such as an overshoot by a method wherein external power-supply systems of a reference-voltage generation circuit and an internal power- supply circuit are separated mutually at one side of the high-level side or the low-level side or on both sides.

CONSTITUTION: An internal power-supply voltage Vint which is output from an internal power-supply voltage circuit 7 makes a charge or discharge current flow according to the operation of an internal circuit 3 and in input/output circuit 4. Thereby, a power-supply current of the circuit 7 is charged. This charge forms a potential difference by a resistance component or the like contained in an external power-supply system 11 of the circuit 7. At this time, an external power supply Vdd2 is supplied to a reference-voltage generation circuit 6 from a system 12 separated from the circuit 7; an electric current flowing in itself is stationary and comparatively small and does not cause a substantial change in the electric current. Thereby, since a reference voltage Vref output from the circuit 6 is kept constant, the circuit 7 controls the operating point of the circuit in such a way that the Vref and the Vint have a constant ratio and makes the voltage Vint constant. Thereby, it is possible to prevent a malfunction of the circuits 3, 4, and the operation speed can be made high.


Inventors:
TAKAHASHI TOSHIRO
Application Number:
JP4357690A
Publication Date:
November 05, 1991
Filing Date:
February 23, 1990
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L21/822; G05F1/46; G11C5/14; G11C11/407; H01L21/82; H01L21/8238; H01L27/02; H01L27/04; H01L27/08; H01L27/092; (IPC1-7): H01L21/82; H01L27/04; H01L27/08
Attorney, Agent or Firm:
Shizuyo Tamamura