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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH04150226
Kind Code:
A
Abstract:

PURPOSE: To attain the miniaturization of a circuit by giving either of an H level and an L level to a programmable divider as a frequency division ratio setting signal when the level of plural input terminals used for setting the frequency division ratio is at an H level or an L level and giving the other as the frequency division ratio setting signal when the input terminals are in an open state.

CONSTITUTION: This circuit is provided with a 1st input terminal P1 receiving an external frequency division signal, and plural 2nd input terminals D1-D6 used to set a frequency division ratio externally, and an input circuit 10 outputs one of an H or an L level as a frequency division ratio signal when the level of 2nd relevant input terminals D1-D6 is at an H or an L level, outputs the other frequency division ratio signal when the level of 2nd relevant input terminals D1-D6 is opened, and the frequency division ratio of a programmable divider 2 is decided in response to the frequency division ratio, signal. Thus, in order to obtain a desired frequency division ratio, only required input terminals among the 2nd relevant input terminals D1-D6 are fixed, and the other input terminals are kept open as they are. Thus, the package is miniaturized.


Inventors:
SATO FUMIO
Application Number:
JP27263390A
Publication Date:
May 22, 1992
Filing Date:
October 09, 1990
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03K23/66; H03L7/183; (IPC1-7): H03L7/183
Attorney, Agent or Firm:
Masuo Oiwa (2 outside)



 
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