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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH04330762
Kind Code:
A
Abstract:

PURPOSE: To enable the fluctuation in the contact resistance to be measured with high precision by a method wherein a contact in the same size and shape as those of a contact to be inspected is formed on an emitter diffused layer while the emitter diffused layer in the size sufficiently larger than that of the contact is formed.

CONSTITUTION: An emitter contact 10 in the same size and shape as those of a contact to be inspected is formed using the emitter contact 10 as an object of inspection. At this time, the plane size of an emitter diffused layer 8 wherein the emitter contact 10 is provided is made sufficiently larger than that of the contact 10 thereby enabling the contact 10 to be formed into a flat surface. Through these procedures, the contact 10 can be inspected measuring the emitter resistance thereby enabling the contact resistance to be inspected with high precision regardless of the variation in the contact resistance due to the variation in the size of lithography.


Inventors:
MIZUSHIMA KAZUYUKI
Application Number:
JP2388091A
Publication Date:
November 18, 1992
Filing Date:
January 25, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L21/28; H01L21/66; (IPC1-7): H01L21/28; H01L21/66
Attorney, Agent or Firm:
Suzuki Akio