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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH0574939
Kind Code:
A
Abstract:

PURPOSE: To prevent a signal-delay phenomenon that affects an adjacent signal conductor, by classifying signal conductors into common-input logic circuit groups, and providing a shielding wire between these groups of signal conductors for transmitting a decoded signal from a decoding circuit.

CONSTITUTION: Each shielding line SL1 or SL2 is located between signal line groups, such as a group of signal conductors L1, L2, L3, and L4 for transmitting a decoded signal from a decoding circuit DEC1, a group of signal lines L5, L6, L7, and L8 from a decoding circuit DEC2, a group of signal lines L9, L10, L11, and L12 from a decoding circuit DEC 3. Then, a ground line GL is connected to the shielding lines SL1 and S12 through a connection line CL, which is provided at right angles to these shielding lines SL1 and SL2. In these three signal line groups, only one signal line in each group is set to a high level, and therefore two adjacent signal lines can not be changed to a high level at the same time.


Inventors:
OKUMA YOSHIYUKI
Application Number:
JP26109991A
Publication Date:
March 26, 1993
Filing Date:
September 11, 1991
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L21/82; H01L21/3205; H01L23/52; H03K19/003; (IPC1-7): H01L21/3205; H01L21/82; H03K19/003
Attorney, Agent or Firm:
Tomio Ohinata