Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH06112406
Kind Code:
A
Abstract:
PURPOSE: To provide a semiconductor integrated circuit in which the performance degradation generating when capacitive coupling is conducted is prevented, and also to avoid an increase in cost.
CONSTITUTION: The first layer wiring 12 which is formed on the semiconductor substrate 11 having a semiconductor element and electrically connected to the semiconductor element, an insulating film 13, to be used for formation of a capacitor of the prescribed thickness, which is formed on the above-mentioned first layer wiring, and the second layer wiring 14, to be used for a bonding pad, formed on the insulating film, are provided on the title semiconductor integrated circuit.
Inventors:
HANADA TOMOKO
NAGASAWA HIRONORI
NAGASAWA HIRONORI
Application Number:
JP26094192A
Publication Date:
April 22, 1994
Filing Date:
September 30, 1992
Export Citation:
Assignee:
TOSHIBA CORP
TOSHIBA MICRO ELECTRONICS
TOSHIBA MICRO ELECTRONICS
International Classes:
H01L21/3205; H01L21/822; H01L23/52; H01L27/04; (IPC1-7): H01L27/04; H01L21/3205
Attorney, Agent or Firm:
Hidekazu Miyoshi (1 outside)
Previous Patent: A connector assembly for cell culture containers
Next Patent: AIRED RADIAL TIRE FOR PASSENGER CAR
Next Patent: AIRED RADIAL TIRE FOR PASSENGER CAR