PURPOSE: To facilitate distribution/wiring and also increase the degree of integration for the semiconductor integrated circuit, by securing two or more word lines and bit lines, forming the MOS-type transistor at the crossing position of these lines and then selecting one of the two threshold levels by the transistor.

CONSTITUTION: The MOS-type transistors TR11∼14, 21∼24, 31∼34 and 41∼44 are provided at the crossing positions between the bit lines 5∼8 and word lines 10, 20, 30 and 40 each. And one of the high and low threshold voltage levels is selected. In this instant, the transistors having the high threshold voltage levels have no conductive under working among the array of transistors. Accordingly, the combination of the transistors having the low threshold voltage levels is designated among the 4×4 transistor groups, thus forming a certain combination logic between the output terminals 49∼52 and the input terminlas 45∼48. And the logic function block comprising the combination logic can be formed with the standard cell. As a result, a logic integrated circuit can be obtained by performing the wiring among the cells and in a matrix formation.