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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS59161858
Kind Code:
A
Abstract:

PURPOSE: To contrive to miniaturize a required substrate by a method wherein wiring is performed in staggered form by shifting every other piece of the contact parts of resistance elements having said parts of large width at both ends.

CONSTITUTION: A plurality of slender resistance elements 12 are formed on a semiconductor substrate 11 by arrangement in three pieces or more. These elements have, at both ends of the resistance layer, contact parts 12b wider than this resistance layer. Each element 12 formed on the substrate 11 has the arrangement, wherein contact parts 12b at both ends are shifted in staggered form and put side by side transversally, between the adjacent element 12. Such an arrangement enables to reduce the occupation area of the substrate 11, therefore the titled device can be miniaturized without the deterioration in its performance.


Inventors:
TAKAHASHI JIYUNKO
TANABE KOUICHI
Application Number:
JP3693783A
Publication Date:
September 12, 1984
Filing Date:
March 07, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
H01L27/04; H01L21/822; H01L27/08; H01L29/41; (IPC1-7): H01L27/04; H01L29/44
Attorney, Agent or Firm:
Uchihara Shin