PURPOSE: To allow the delay time to be variable of the output of an IC block by a method wherein a MIS-type capacitor containing a charge holding layer is connected to the load of the IC block and the capacity of the capacitor is subjected to regulation.

CONSTITUTION: The output of an IC is supplied to a circuit block CB and, to the output of the circuit block CB, capacity is supplied from a MIS-type capacitor 1, and then the output is further transmitted out of the circuit. In this design, a charge holding layer 2 is provided within the capacitor 1 and the capacitor 1 is exposed to a variable voltage supplied by a power source Vp to keep the value of the capacity as prescribed so that the delay time involving the circuit block CB may be allowed to vary. For this purpose, a C-MOS transmission gate TG is connected across the power source Vp and the capacitor 1. A signal (c) or (-c) is applied to the transmission gate TG and the output with its capacity changed due to the signal application is applied to the junction point with the circuit block CB.