Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS615565
Kind Code:
A
Abstract:

PURPOSE: To prevent a chip area from enlargement being required for the insertion of aligning patterns, company names, item names, checking patterns, and the like by a method wherein characters, figures, and symbols are constructed in the metal region of a metal-insulator-semiconductor condenser.

CONSTITUTION: On a silicon substrate 3, an aluminum layer 1 is formed by vapor deposition after the formation of a silicon oxide film 2 by a prescribed thermal oxidation method. Etching follows whereby the aluminum layer 1 is removed of unnecessary portions, for the formation of a MOS condenser. Insertion into the etching mask for the aluminum layer 1 of characters, figures, symbols 4, 4' results in a MOS condenser fully functioning as such while accommodating necessary characters, figures, etc. The area the MOS condenser occupies is enlarged by the characters punched through, but the chip area can be made small enough because the MOS capacitor grows larger not by the size of the characters, etc. but only by the area occupied by the incorporated characters and figures.


Inventors:
Oka, Kenji
Application Number:
JP1984000126109
Publication Date:
January 11, 1986
Filing Date:
June 19, 1984
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC CORP
International Classes:
H01L27/04; H01L21/02; H01L21/822; H01L23/544; (IPC1-7): H01L21/02; H01L27/04