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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS63108763
Kind Code:
A
Abstract:

PURPOSE: To manufacture a MIS type capacitor for an LSI having large electrostatic capacitance per unit area by forming a semiconductor integrated circuit in two layer constitution of parallel connection.

CONSTITUTION: A first capacitor is formed of an N+ type semiconductor layer 2 in an N-type semiconductor substrate 1, a first insulating film 3 of silicon oxide deposited on the layer 2, and a first metallic film 4 of Al, and a second capacitor is formed of the film 4, a second insulating film 5 of silicon oxide deposited on the film 4, and a third metallic film 6 of Al, etc. The film 6 and the layer 2 are connected by a through-hole 7, the second metallic film 8, etc., and consequently these two-layered capacitors are connected in parallel. This two-layer structure and parallel connection allow an LSI MIS capacitor to have an increased capacitance per unit area.


Inventors:
KOYAMA HIDEAKI
Application Number:
JP25610386A
Publication Date:
May 13, 1988
Filing Date:
October 27, 1986
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L27/04; H01L21/822; (IPC1-7): H01L27/04
Attorney, Agent or Firm:
Uchihara Shin



 
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