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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED DEVICE
Document Type and Number:
Japanese Patent JPS6455857
Kind Code:
A
Abstract:

PURPOSE: To allow the arbitrary setting of voltage levels of an internal power supply by integrating within one chip an internal power cable, a power voltage conversion circuit by which to apply a certain level of voltage to the cable, and a switching transistor by which to apply a first or second external power voltage.

CONSTITUTION: A device is formed by an integrated circuit block 1 consisting of a MISFET whose gate length is short; an internal power cable 2 by which to supply currents from an external power supply to the integrated circuit block; a power voltage conversion circuit 3, connected to another cable, by which to apply a certain level of voltage to this internal power cable 2; and a MISFET 4 serving as a switching transistor which applies a voltage Ve from the external power supply to the internal power cable 2 while controlling Ve by a switching signal . In the normal operation, a voltage level of the switching signal is set so that the MISFET 4 is in non-conduction, while, to conduct an acceleration test by high voltage operation, it is set so that the MISFET 4 is in conduction, and the external power voltage Ve is applied to the internal power cable 2.


Inventors:
TAKADA TADAHIDE
Application Number:
JP21339587A
Publication Date:
March 02, 1989
Filing Date:
August 26, 1987
Export Citation:
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Assignee:
NEC CORP
International Classes:
G11C11/401; G01R31/30; G11C5/14; G11C11/407; G11C29/00; G11C29/06; G11C29/50; H01L21/822; H01L27/04; H01L27/10; (IPC1-7): G11C11/34; H01L27/04; H01L27/10
Domestic Patent References:
JPS5870482A1983-04-26
JPS63181196A1988-07-26
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)