SEMICONDUCTOR LAMINATION UNIT

Japanese Patent JP2018060863

A

PROBLEM TO BE SOLVED: To provide an art relevant to a semiconductor lamination unit where semiconductor modules and coolers are alternately laminated to make it possible to achieve reduced inductance of a terminal extending from the semiconductor module at low cost by utilizing structural features of the cooler.SOLUTION: A semiconductor lamination unit 20 includes semiconductor modules 3 and coolers 4 which are alternately laminated. The semiconductor module 3 has power terminals 3a-3c which extend from one lateral face (upper surface) parallel with a lamination direction with the coolers 4 and which are electrically connected with an inside semiconductor element. The cooler 4 has a hollow shape where flange faces of a pair of tray-like metal plates having flanges 4a are joined and the cooler 4 is arranged in such a manner that the flange faces face in the lamination direction. The cooler 4 includes an extension part 4b which is obtained by extension of the flange 4a and provided on the flange part on the same side with an upper surface of the semiconductor module 3 so as to face the power terminals 3a-3c.SELECTED DRAWING: Figure 2

MIURA SHINICHI

JP2016195868A

April 12, 2018

October 03, 2016

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TOYOTA MOTOR CORP

H01L23/473; H02M7/48

JP2011009462A	2011-01-13
JP2015208115A	2015-11-19
JPH09172139A	1997-06-30
JP2016093090A	2016-05-23
JP2007173372A	2007-07-05
JP2014060304A	2014-04-03

US5761040A	1998-06-02
CN105576996A	2016-05-11
US20060128216A1	2006-06-15

Kaiyu International Patent Office

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