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Patent Searching and Data


Title:
SEMICONDUCTOR AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPS6422046
Kind Code:
A
Abstract:

PURPOSE: To accomplish a good connection by providing a first wiring layer to be connected to the impurity diffusion region in the part on the end of a field insulating film where the substrate is exposed, and a second wiring layer connecting to the first wiring layer in the opening part of an inter-layer insulating film.

CONSTITUTION: A first wiring layer 6 is comprised of, for instance, a polycrystalline silicon layer and extended to become the gate electrode of an MOS transistor for instance. The first wiring layer 9 directly connects to an impurity diffusion region 3 through a part 5 where the substrate is exposed. A second wiring layer 9 connects to the first wiring layer 6 through the opening part 7 of an inter-layer insulating film 8 provided on the first wiring layer 6. It thus connects to the impurity diffusion region 3 through the first wiring layer 6. The second wiring layer 9 has an impurity introduced into, for instance, the connection region thereof. With this, even if the second wiring layer is provided with an ultra-high resistance, the connecting resistance between the impurity diffusion region 3 and the first wiring layer 6 can be made sufficiently low.


Inventors:
OKAMOTO YUTAKA
Application Number:
JP17861987A
Publication Date:
January 25, 1989
Filing Date:
July 17, 1987
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L23/522; H01L21/768; (IPC1-7): H01L21/90
Domestic Patent References:
JPS5756958A1982-04-05
JPS604253A1985-01-10
JPS60170966A1985-09-04
Attorney, Agent or Firm:
Akira Koike