Title:
SEMICONDUCTOR AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2010272826
Kind Code:
A
Abstract:
To prevent short-circuit between wiring and deterioration of reliability by preventing the damage of the surface of an insulation film and uniformly controlling the thickness of wiring film.
The method includes steps of: forming an insulation film 102 on a semiconductor substrate 101; forming an ion implanted layer 103 in the insulation film 102 by an ion injection method; forming a wiring trench 104 in the insulation film 102 with a depth at least reaching the ion implanted layer 103, forming an conductive film 107A in the wiring trench 104; and removing a region in the insulation film 102 and the conductive film 107A formed above the ion implanted layer 103.
Inventors:
KOBAYASHI KENJI
Application Number:
JP2009125745A
Publication Date:
December 02, 2010
Filing Date:
May 25, 2009
Export Citation:
Assignee:
PANASONIC CORP
International Classes:
H01L21/768; H01L23/522
Attorney, Agent or Firm:
Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura
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