PURPOSE: To increase the integration of a semiconductor memory circuit and to speed up data reading by variable constituting a decoder driving resistor so that its output resistance is set up to a comparatively large resistance value at the time of writing.
CONSTITUTION: The resistance value of an output resistor RIA connected to the output of a TR QD1 in parallel is set up to a comparatively small value and that of an output resistor RIB is set up to a comparatively large value. Since the resistance value of the output resistor of the decoder driver TR is increased at the time of writing, current flowing into the decoder driver TR is reduced in accordance with the increase. Since the current absorbing capacity of the decoder driver TR may be small, the capacity of a pattern for forming the TR may be small. Since the resistance value of the output resistor of the decoder driver TR is reduced at the time of reading, the rise of a word line is also accelerated and the speed-up of reading can be attained.