To provide a semiconductor memory device and its test method which can perform a manufacturing test easily and surely by simple constitution and method in a semiconductor memory device making a latch circuit a storage element.

This device is a semiconductor memory device comprising a plurality of memory cells M1-M4 constituted of a latch means, and the device is provided with gated clock circuits GC1-GC4 writing the same data in all memory cells M1-M4 in accordance with a supplied simultaneous write-in signal T, inverters INV2, INV3 reversing data outputted from the memory cells M1-M4, and selectors SEL5, SL7 writing selectively the reversed data in the memory cell.