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Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP2004281736
Kind Code:
A
Abstract:

To contrive the microfabrication of a memory cell consisting of a capacitor and two sets of switching elements, and improve the data retaining characteristics of the memory cell.

In one set of memory cell M, first and second switching elements Tr1, Tr2 are arranged respectively at both sides of a capacitor contact 111 connected to a capacitor for accumulating data in an active region 102 so as to pinch the capacity contact 111 while first and second bit line contacts are arranged at the outside of both switching elements. A plurality of memory cells are formed in the straight linear active region whereby the generation of a bent part in the active regions and the deterioration of characteristics of the memory cell caused by the bent part are prevented whereby the microfabrication and improvement of data retaining characteristics of the memory cell are contrived.


Inventors:
TAKAHASHI HIROYUKI
TAKAHASHI HISASHI
Application Number:
JP2003071510A
Publication Date:
October 07, 2004
Filing Date:
March 17, 2003
Export Citation:
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Assignee:
NEC ELECTRONICS CORP
International Classes:
H01L27/108; G11C11/401; G11C11/405; H01L21/8242; (IPC1-7): H01L21/8242; G11C11/401; H01L27/108
Domestic Patent References:
JP2000124331A2000-04-28
JP2002064152A2002-02-28
JPH08204159A1996-08-09
JP2003068896A2003-03-07
JPH11232868A1999-08-27
JP2003197769A2003-07-11
Attorney, Agent or Firm:
Akio Suzuki