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Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP2006216137
Kind Code:
A
Abstract:

To provide a semiconductor memory device capable of constituting a high-speed and high-capacity memory macro.

The semiconductor memory device is provided with an interface section with an external circuit, a write data line, a read data line, a data control unit connected to the interface section via the write data line, a storage storage section having a memory block connected to the data control section, and a read latch block connected between the read data line and the interface section. The data control unit outputs data read from the memory block by using the tail end of a clock as a trigger, the read latch block latches the data, by using the tail end of the other clock after at least a single cycle after from the tail end of the clock, and the interface section outputs the data to the external circuit by using the frond end of yet another clock after the other clock as a trigger.


Inventors:
KAKO MARIKO
Application Number:
JP2005026712A
Publication Date:
August 17, 2006
Filing Date:
February 02, 2005
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G11C11/401; G11C11/409
Domestic Patent References:
JP2000048566A2000-02-18
JP2000200488A2000-07-18
JP2006216136A2006-08-17
JP2000048566A2000-02-18
JP2000200488A2000-07-18
JP2006216136A2006-08-17
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto



 
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