SEMICONDUCTOR MEMORY DEVICE

Title:

SEMICONDUCTOR MEMORY DEVICE

Document Type and Number:

Japanese Patent JP2010020839

Kind Code:

A

Abstract:

To increase the operation speed of a semiconductor memory including an ECC circuit.

A read signal RYPA to control the operation timing of a read latch circuit 101 is input to a read latch circuit 101 and also to an ECC replica circuit 105. The signal is input to a write-buffer circuit 104 as a write signal WYPA at a timing delayed by the time corresponding to the signal propagation time through the circuit corresponding to the signal propagation path in an ECC circuit 102.

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Inventors:

NAKAMURA TOSHIHIRO
IIDA MASAHISA

Application Number:

JP2008180388A

Publication Date:

January 28, 2010

Filing Date:

July 10, 2008

Export Citation:

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Assignee:

PANASONIC CORP

International Classes:

G11C29/42; G11C11/401; G11C11/413

Attorney, Agent or Firm:

Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura

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