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Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP2011154754
Kind Code:
A
Abstract:

To provide a semiconductor memory device capable of stably reading out data by a sense amplifier without increasing a circuit scale or control lines.

The semiconductor memory device includes the sense amplifier, a plurality of memory cell arrays, a shared MOS transistor for connecting or disconnecting bit lines provided in the sense amplifier and the memory cell array, and a control circuit for controlling the operation of shared MOS transistor. A part or all of bit lines in the sense amplifier which are bit lines connecting the sense amplifier and the shared MOS transistor are embedded in a semiconductor substrate.


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Inventors:
YOSHIDA SOICHIRO
YANAGAWA YOSHIMITSU
SEKIGUCHI TOMONORI
KOTABE AKIRA
Application Number:
JP2010015327A
Publication Date:
August 11, 2011
Filing Date:
January 27, 2010
Export Citation:
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Assignee:
ELPIDA MEMORY INC
International Classes:
G11C11/401; G11C11/4091; G11C11/4097
Domestic Patent References:
JP2001102549A2001-04-13
JP2009059735A2009-03-19
JPH04324676A1992-11-13
JPH06268173A1994-09-22
JPH03285352A1991-12-16
JPH0541081A1993-02-19
Foreign References:
WO2009096468A12009-08-06
Attorney, Agent or Firm:
Akio Miyazaki
Ishibashi Masayuki
Masaaki Ogata



 
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