Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP2014220487
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor memory device having small wiring resistance and low power consumption, and to provide a method of manufacturing the same.SOLUTION: A semiconductor memory device includes a memory cell array having a plurality of lower wiring lines extending in a first direction, a plurality of upper wiring lines disposed above the plurality of lower wiring lines and extending in a second direction, a plurality of memory cells provided at each crossing portion of the plurality of lower wiring lines and the plurality of upper wiring lines, and interlayer insulating films provided between the plurality of memory cells adjacent in the second direction. Each upper wiring line is composed of an upper-wiring first portion deposited on each memory cell and an upper-wiring second portion deposited on each interlayer insulating film and having a different crystal grain size from the crystal grain size of the upper-wiring first portion. The top surfaces of the memory cells are lower than the top surfaces of the interlayer insulating films.
Inventors:
NODA KOTARO
Application Number:
JP2014021655A
Publication Date:
November 20, 2014
Filing Date:
February 06, 2014
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
H01L27/105; H01L21/3205; H01L21/768; H01L23/532; H01L45/00; H01L49/00
Attorney, Agent or Firm:
きさらぎ international patent business corporation