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Patent Searching and Data


Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPH0320846
Kind Code:
A
Abstract:

PURPOSE: To prevent a waste part from being generated at a storage part by applying address conversion on an address outputted from an address generation circuit, and setting a conversion address as an input to a decoder.

CONSTITUTION: When both a row address and a column address outputted from the address generation circuits 1 and 2 show zeros, both the low address and the column address of the storage part 7 are conformed to zero. Next, when the row address outputted from the address generation circuit 1 is increased by one, the row address of the storage part 7 is conformed so as to be increased by one. Also, for various kinds of maximum values of the addresses outputted from the address generation circuits 1 and 2, the address conversion corresponding to them are applied. The conversion address is inputted to the decoders 5 and 6.


Inventors:
WATANABE TAKUYA
Application Number:
JP15547289A
Publication Date:
January 29, 1991
Filing Date:
June 16, 1989
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
G06F12/02; G11C8/00; (IPC1-7): G06F12/02; G11C8/00
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)