PURPOSE: To decrease an operating current in ordinary read or write mode of a dynamic RAM, etc., to lower the power consumption of the dynamic RAM, etc., with an high-speed operation, to improve an information holding characteristic and to stabilize the operation of the dynamic RAM, etc.
CONSTITUTION: A column selection MOSFET Qc which turns on selectively by means of column selection signals YCO-YCn is provided in a memory cell such as the dynamic RAM, etc. Drive selection MOSFETs Q1 and Q6 which turn on selectively by means of the column selection signals YC0-YCn is provided between unit amplifier circuit USAO-USAn in a sense amplifier SA and common source lines SP and SN. Ordinary read and write modes are started by a CAS-before-RAS cycle, a column selection Y address signal is inputted prior to a row selection X address signal and a refreshing mode is started by a RAS-before-CAS cycle.
YAMAGUCHI YASUNORI
OSHIMA KAZUYOSHI