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Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS6018898
Kind Code:
A
Abstract:

PURPOSE: To improve the reliability of a semiconductor nonvolatile memory device by checking or checking/correcting stored information when the state is transited from the storage holding state to the external access enable state.

CONSTITUTION: When an external current supply is interrupted, a current is supplied to a memory section 1 from a battery 7 as a backup power supply so as to prevent the volatility of stored information in the memory section 1. When the external power supply is restored, a current is supplied to other circuits from a power supply section 6 and the state becomes the electrically accessible state. The storage information in the memory section 1 is checked by the state changeover. That is, when a power supply confirming signal is given from the power supply section 6, a main control circuit 5 sets an address counter 4 to an initial value, counts up sequentially the address so as to read the storage information of the memory section 1. A parity check circuit 3 checks the content at the same time. When no error exists in the storage information, the state is transited to the externally accessible state at a point of time when the check of the content of all the memories is finished. If there exists any error, it is regarded that the storage information in the memory section 1 is destroyed and the main control circuit raises alarm information to an external device.


Inventors:
SASAMOTO YOSHIFUMI
Application Number:
JP12583383A
Publication Date:
January 30, 1985
Filing Date:
July 11, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F12/16; G11C29/04; (IPC1-7): G11C29/00
Domestic Patent References:
JPS5891539A1983-05-31
Attorney, Agent or Firm:
Sugano Naka



 
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