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Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS62188376
Kind Code:
A
Abstract:

PURPOSE: To obtain a transistor virtually serving as an non-volatile memory transistor and selecting transistor for the realization of a cell occupying a smaller are by a method wherein an opposite-conductivity region is formed in a semiconductor substrate just under one of thick silicon oxide films in contact with both sides of a thin silicon oxide film.

CONSTITUTION: At the center of a prescribed region on a semiconductor substrate 1 of one conductivity type, a thin silicon oxide film 5 and thick silicon oxide films 6 are formed, to be in contact with both sides of the thin silicon oxide film 5. Next, on the silicon oxide films 5 and 6, an insulating layer 7 and conducting layer 8 are formed, in that order. Just under one of the thick silicon oxide films 6, in the semiconductor substrate 1, a first opposite-conductivity region 4 with its conductivity type opposite to that of the semiconductor substrate 1 is formed. In the semiconductor substrate 1, at portions adjacent to the portion just under the thick silicon oxide films 6, second opposite-conductivity regions 2 and 3 with their conductivity type opposite to that of the semiconductor substrate 1 are formed and, on the second opposite-conductivity regions 2 and 3, contact electrodes 15 and 14 are built. Accordingly, with a single transistors performing the duties of two transistors, the area for a cell may be greatly reduced.


Inventors:
SATO KAZUO
Application Number:
JP2908186A
Publication Date:
August 17, 1987
Filing Date:
February 14, 1986
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L21/8247; H01L29/78; H01L29/788; H01L29/792; (IPC1-7): H01L29/78
Attorney, Agent or Firm:
Koji Hoshino



 
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