PURPOSE: To reduce an excessively large transient current while the operating speed is maintained, by performing the charging operation and discharging operation of different data lines at almost the same time by using a sense amplifier and active restore.

CONSTITUTION: Pulses S0 and A1 are simultaneously turned on and a sense amplifier SA on a memory cell array side containing D0 and D0' and an active restore AR on another memory cell array side containing D0' and D0" are almost simultaneously activated. When an active restore AR on the memory cell array side containing D0 and D0' and a sense amplifier SA on the memory cell array side containing D0' and -D0' are almost simultaneously activated by simultaneous ly turning on pulses A0 and S1 in the next place, an entire transient current is reduced to a half. Moreover, since, for example, one piece of clock selected by a Y decoder of Y0, etc., is turned on and differentially outputted to I/O-I/O' pair lines and readout signals corresponding to the one set become a data output DOUT after the data pair lines D0 and D0' and D0' and D0", etc., are charged and discharged, the access time never becomes longer.